vishay siliconix si1330edl document number: 72861 s10-0721-rev. b, 29-mar-10 www.vishay.com 1 n-channel 60 v (d-s) mosfet features ? halogen-free according to iec 61249-2-21 definition ? trenchfet ? power mosfet ? esd protected: 2000 v ? compliant to rohs directive 2002/95/ec applications ? p-channel driver - notebook pc - servers product summary v ds (v) r ds(on) ( )i d (a) 60 2.5 at v gs = 10 v 0.25 3 at v gs = 4.5 v 0.23 8 at v gs = 3 v 0.05 sot-323 sc-70 (3-leads) 1 2 3 to p v i ew g s d marking code kd xx lot traceability and date code part # code yy ordering information: si1330edl-t1-e3 (lead (pb)-free) si1330edl-t1-ge3 (lead (pb)-free and halogen-free) d s g notes: a. surface mounted on 1" x 1" fr4 board. absolute maximum ratings t a = 25 c, unless otherwise noted parameter symbol 5 s steady state unit drain-source voltage v ds 60 v gate-source voltage v gs 20 continuous drain current (t j = 150 c) a t a = 25 c i d 0.25 0.24 a t a = 70 c 0.2 0.19 pulsed drain current i dm 1.0 continuous source current (diode conduction) a i s 0.26 0.23 maximum power dissipation a t a = 25 c p d 0.31 0.28 w t a = 70 c 0.20 0.18 operating junction and storage temperature range t j , t stg - 55 to 150 c thermal resistance ratings parameter symbol typical maximum unit maximum junction-to-ambient a t 5 s r thja 355 400 c/w steady state 380 450 maximum junction-to-foot (drain) steady state r thjf 285 340
www.vishay.com 2 document number: 72861 s10-0721-rev. b, 29-mar-10 vishay siliconix si1330edl notes: a. pulse test: pw 300 s, duty cycle 2 %. b. guaranteed by design, not s ubject to production testing. stresses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. typical characteristics 25 c, unless otherwise noted specifications t j = 25 c, unless otherwise noted a parameter symbol test conditions limits unit min. typ. max. static drain-source breakdown voltage v ds v gs = 0 v, i d = 10 a 60 v gate-threshold voltage v gs(th) v ds = v gs , i d = 250 a 1 2.0 2.5 gate-body leakage i gss v ds = 0 v, v gs = 10 v 1 a zero gate voltage drain current i dss v ds = 60 v, v gs = 0 v 1 v ds = 60 v, v gs = 0 v, t j = 55 c 10 on-state drain current b i d(on) v gs = 10 v, v ds = 7.5 v 0.5 a v gs = 4.5 v, v ds = 10 v 0.4 v gs = 3 v, v ds = 10 v 0.05 drain-source on-resistance b r ds(on) v gs = 10 v, i d = 0.25 a 1.0 2.5 v gs = 4.5 v, i d = 0.2 a 1.4 3 v gs = 3 v, i d = 0.025 a 3.0 8 forward transconductance b g fs v ds = 10 v, i d = 0.25 a 350 ms diode forward voltage v sd i s = 0.23 a, v gs = 0 v 0.83 1.2 v dynamic b total gate charge q g v ds = 10 v, v gs = 4.5 v i d ? 0.25 a 0.4 0.6 nc gate-source charge q gs 0.11 gate-drain charge q gd 0.15 gate resistance r g 173 tu r n - o n t i m e t d(on) v dd = 30 v, r l = 150 i d ? 0.2 a, v gen = 10 v r g = 10 3.8 10 ns t r 4.8 15 turn-off time t d(off) 12.8 20 t f 9.6 15 output characteristics 0.0 0.2 0.4 0.6 0.8 1.0 012345 v ds - drain-to-source voltage (v) - drain current (a) i d v gs = 10 v, 7 v 3 v 5 v 4 v 6 v transfer characteristics 012345 v gs - gate-to-source voltage (v) - drain current (a) i d t j = - 55 c 125 c 25 c 1.0 0.8 0.6 0.2 0 0.4
document number: 72861 s10-0721-rev. b, 29-mar-10 www.vishay.com 3 vishay siliconix si1330edl typical characteristics 25 c, unless otherwise noted on-resistance vs. drain current on-resistance vs. junction temperature on-resistance vs. gate-source voltage 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0.0 0.2 0.4 0.6 0.8 1.0 i d - drain current (ma) v gs = 4.5 v v gs = 10 v - on-resistance ( ) r ds(on) 0.0 0.4 0.8 1.2 1.6 2.0 - 50 - 25 0 25 50 75 100 125 150 t j - junction temperature (c) v gs = 10 v at 250 ma v gs = 4.5 v at 200 ma r ds(on) - on-resistance (normalized) 0 1 2 3 4 5 0246810 v gs - gate-to-source voltage (v) i d = 200 ma - on-resistance ( ) r ds(on) gate charge source-drain diode forward voltage threshold voltage variance over temperature 0 1 2 3 4 5 6 7 0.0 0.1 0.2 0.3 0.4 0.5 0.6 v ds = 10 v i d = 250 ma - gate-to-source voltage (v) q g - total gate charge (nc) v gs 1.2 1.5 1 100 1000 0 0.3 0.6 0.9 t j = 25 c t j = 125 c v sd - source-to-drain voltage (v) - source current (a) i s 10 t j = - 55 c v gs = 0 v - 0.8 - 0.6 - 0.4 - 0.2 0.0 0.2 0.4 - 50 - 25 0 25 50 75 100 125 150 i d = 250 a variance (v) v gs(th) t j - temperature (c)
www.vishay.com 4 document number: 72861 s10-0721-rev. b, 29-mar-10 vishay siliconix si1330edl typical characteristics 25 c, unless otherwise noted vishay siliconix maintains worldwide manufacturing capability. products may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?72861 . single pulse power 0 3 5 1 2 power (w) time (s) 4 1 100 600 10 10 -1 10 -2 t a = 25 c safe operating area 10 0.1 0.1 1 10 100 0.001 1 t a = 25 c single pulse 0.01 i d(on) limited * ds(on) limited by r bvdss limited i dm limited 1 ms 10 ms 100 ms 1 s v ds - drain-to-source voltage (v) *v gs > minimum v gs at which r ds(on) is specified - drain current (a) i d 10 s, d c normalized thermal transient impedance, junction-to-ambient 10 -3 10 -2 1 10 600 10 -1 10 -4 100 2 1 0.1 0.01 0.2 0.1 0.05 0.02 single pulse duty cycle = 0.5 square wave pulse duration (s) normalized effective transient thermal impedance 1. duty cycle, d = 2. per unit base = r thja = 380 c/w 3. t jm - t a = p dm z thja (t) t 1 t 2 t 1 t 2 notes: 4. surface mounted p dm normalized thermal transient impedance, junction-to-foot 10 - 3 10 - 2 110 10 - 1 10 - 4 2 1 0.1 0.01 0.2 0.1 0.05 0.02 single pulse duty cycle = 0.5 square wave pulse duration (s) normalized eff ective transient thermal impedance
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